Technical Program

General Program (SBCCI, SBMicro, WCAS, SForum, PATMOS and VARI)

SBCCI Program

Tuesday, September 1st
Tutorials - Room: Fernando Pessoa 2
Tutorial 1
Low Power Design Essentials
Jan Rabaey
University of California at Berkeley - UCB, USA
10:20-10:40 Coffe-Break & Exhibitors
Tutorial 2
Ultra-Low-Voltage (ULV) IC Design: Designing for VDD below kT/q
Márcio Cherem Schneider
Universidade Federal de Santa Catarina - UFSC, Brazil
Tutorial 3A
Impact of Low Frequency Noise on the Reliability and Variability of Nano CMOS devices
Jalal Jomaah
Institut National Polytechnique de Grenoble - INPG, France; Lebanese University
CANCELLED - Due to unforeseen circumstances
15:40-16:00 Coffe-Break & Exhibitors
Tutorial 4A
Cyber - Physical Systems: Reality, Dreams, and Fantasy
Magdy A. Bayoumi
University of Louisiana at Lafayette, USA
Tutorials - Room: Fernando Pessoa 3
Tutorial 3B
3D ICs - Moving from Silicon to Heterogeneous Technologies
Maciej Ogorzalek
Jagiellonian University, Krakow, Poland
15:40-16:00 Coffe-Break & Exhibitors
Tutorial 4B
Low Loss, High Isolation, Linear RF Switch Design in SOI
Peter H. Popplewell
Skyworks Solutions, Canada
CANCELLED - Due to unforeseen circumstances
Opening - Room: Fernando Pessoa 1 & 2 - 18:00 - 18:20
SBmicro Awards - Room: Fernando Pessoa 1 & 2 - 18:20 - 18:40
Welcome Reception and Cocktail - Room: Foyer S2 & Praça Luiz de Camões - 18:40 - 20:00
Wednesday, September 2nd
Keynotes - Room: Fernando Pessoa 1 & 2
Keynote 1
Lessons from Brain Connectivity for Future Interconnect in ICs
Jan Rabaey
University of California at Berkeley - UCB, USA
09:40-10:00 Coffe-Break & Exhibitors
Session 1A - Digital, Reconfigurable and Applications - Room: Fernando Pessoa 2
Chair: Ney Laert Vilar Calazans
Designing CMOS for Near-Threshold Minimum-Energy Operation and Extremely Wide V-F Scaling
André Luís Rodeghiero Rosa, Leonardo Bandeira Soares, Kleber Hugo Stangherlin and Sergio Bampi
10:20-10:40 Analysis of Supply Voltage Scaling on SDDS-NCL Designs
Ricardo Aquino Guazzelli, Matheus Trevisan Moreira, Ney Laert Vilar Calazans and Fernando Gehm Moraes
10:40-11:00 MCML Gate Design for Standard Cell Design
Bruno Canal, Cicero Nunes, Renato Ribas and Eric Fabris
11:00-11:20 Minimization and Encoding of High Performance Asynchronous State Machines Based on Genetic Algorithm
Tiago Curtinhas, Duarte Lopes Oliveira, Lester de Abreu Faria, Osamu Saotome and Tassio Cortes Cavalcanti
A Framework for Multi-FPGA Interconnection using Multi Gigabit Transceivers
Michael Dreschmann, Jan Heisswolf, Michael Geiger, Manuel Haussecker and Juergen Becker
Session 1B - Analog & RF & Mixed Signal - Room: Zélia Gatai 1
Chair: Hamilton Klimach
10:00-10:20 A Current Limiter for Linear Regulators Based on Power-Dissipation Threshold
Jader A. De Lima and Wallace A. Pimenta
10:20-10:40 High PSRR Nano-Watt MOS-Only Threshold Voltage Monitor Circuit
Jhon Alexander Gómez Caicedo, Hamilton Klimach, Eric Fabris and Oscar Elisio Mattia
10:40-11:00 Design of high-voltage level shifters based on stacked standard transistors for a wide range of supply voltages
Sara Pashmineh and Dirk Killat
11:00-11:20 0.5 V Supply Resistorless Voltage Reference for Low Voltage Applications
Renato Campana, Hamilton Klimach and Sergio Bampi
11:20-11:40 0.5 V Supply Voltage Reference Based on the MOSFET ZTC Condition
David Cordova, Pedro Toledo, Hamilton Klimach, Sergio Bampi and Eric Fabris
12:00-13:20 Lunch
Invited Talks - Room: Fernando Pessoa 2
Invited Talk 1
Frame Free Vision
Teresa Serrano-Gotarredona
IMSECNM-CSIC, Sevilla; University of Sevilla, Spain
Session 2 - SoC, NoC, Embedded - Room: Fernando Pessoa 2
Chair: Fernando Gehm Moraes
14:00-14:20 A Low-Area and High-Throughput Intra Prediction Architecture for a Multi-Standard HEVC and H.264/AVC Video Encoder
Marcel Corrêa, Marcelo Porto, Bruno Zatt and Luciano Agostini
14:20-14:40 Memory-Aware and High-Throughput Hardware Design for the HEVC Fractional Motion Estimation
Vladimir Afonso, Henrique Maich, Luan Audibert, Bruno Zatt, Marcelo Porto and Luciano Agostini
14:40-15:00 Real-Time Architecture for HEVC Motion Compensation Sample Interpolator for UHD Videos
Wagner Penny, Guilherme Paim, Marcelo Porto, Luciano Agostini and Bruno Zatt
15:00-15:20 A Distributed Energy-aware Task Mapping to Achieve Thermal Balancing and Improve Reliability of Many-core Systems
Marcelo Mandelli, Guilherme Castilhos, Luciano Ost, Gilles Sassatelli
and Fernando Moraes
15:20-15:40 Coffe-Break & Exhibitors
Session 3 - CAD, Verification & Test - Room: Fernando Pessoa 2
Chair: Gilson Inácio Wirth
15:40-16:00 Optimum Operating Points of Transistors with minimal Aging-Aware Sensitivity
Nico Hellwege, Nils Heidmann, Steffen Paul and Dagmar Peters-Drolshagen
16:00-16:20 A novel methodology for robustness analysis of QCA circuits
Dayane Reis and Frank Sill Torres
16:20-16:40 Evaluating Geometric Aspects of Non-Series-Parallel Cells
Maicon Cardoso, Leomar Rosa Junior and Felipe Marques
16:40-17:00 Increasing Observability in Post-Silicon Debug Using Asymmetric Omega Networks
André Gomes, Fredy Alves, Ricardo Ferreira and José Nacif
17:00-17:20 Power-Aware Design of Electronic System Level using Interoperation of Hybrid and Distributed Simulations
Helder F. A. Oliveira, Alisson V. Brito, Elmar U. K. Melcher, Harald Bucher, Joseana M. F. R. Araújo, Liana D. Duenha and Rodolfo J. Azevedo
17:20-17:40 Jezz: An Effective Legalization Algorithm forMinimum Displacement
Julia Puget, Guilherme Flach, Marcelo Johann and Ricardo Reis
17:40-18:00 A Parallel Structure Filter Design in Modified Lucy-Richardson Deconvolution Algorithm for Inversely Analyzing Complex-Shaped RTN Long Tail Effects
Hiroyuki Yamauchi and Worawit Somha
Thursday, September 3rd
Keynotes - Room: Fernando Pessoa 1 & 2
Keynote 2
Majority-based synthesis for digital nano-technologies
Giovanni De Micheli
EPFL, Switzerland
Session 4 - Analog & RF & Mixed Signal - Room: Fernando Pessoa 2
Chair: Fernando Rangel de Sousa
10:00-10:20 Optimization Design Methodology for a 460-MHz-GBW and 80-dB-SNR Low-Power Current-Mode Amplifier
Pietro Maris Ferreira, Anthony Kolar and Philippe Bénabès
10:20-10:40 Low power, high-sensitivity clock recovery circuit for LF/HF RFID applicationss
Rafael Cantalice, Fernando Paixão Cortes and Alexandre Simionovski
10:40-11:00 Design of 28 nm CMOS integrated transformers for a 60 GHz power amplifier
Bernardo Leite, Eric Kerhervé and Didier Belot
11:00-11:20 Analysis and Design of a MOS RF Envelope Detector in All Inversion Regions
Linder Reyes and Fernando Silveira
11:20-11:40 A 25-dBm 1-GHz Power Amplifier Integrated in CMOS 180nm for Wireless Power Transferring
Fabian L. Cabrera and F. Rangel de Sousa
12:00-13:20 Lunch
Invited Talks - Room: Fernando Pessoa 2
Invited Talk 2
System-Level Design of Heterogeneous System-on-Chip Architectures
Luca Carloni
Columbia University, USA
Session 5 - SoC, NoC, Embedded - Room: Fernando Pessoa 2
Chair: Fernanda Lima Kastensmidt
14:00-14:20 Reconfigurable group-wise Security Architecture for NoC−Based MPSoCs Protection
Daniel Florez, Guy Gogniat and Martha Johanna Sepulveda
14:20-14:40 Smart Reconfiguration Approach for Fault-Tolerant NoC Based MPSoCs
Jarbas Silveira, Lucas Brahm, Rafael Mota, Alan Cadore, Ramon Fernandes, Cesar Marcon and Paulo Cortez
14:40-15:00 PHiCIT - Improving Hierarchical Networks-on-chip through 3D Silicon Photonics Integration
Cezar Reinbrecht, Martha Johanna Sepúlveda and Altamiro Susin
15:00-15:20 Latency Improvement with Traffic Flow Analysis in a 3D NoC under Multiple Faulty TSVs Scenario
Anelise Kologeski, Henrique Colao Zanuz and Fernanda Lima Kastensmidt
15:20-15:40 Coffe-Break & Exhibitors
Session 6 - Analog & RF & Mixed Signal - Room: Fernando Pessoa 2
Chair: Luciano Volcan Agostini
15:40-16:00 Wideband Low Noise Variable Gain Amplifier
Filipe Baumgratz, Hao Li, Sergio Bampi and Carlos Saavedra
16:00-16:20 A 2-decades Wideband Low-Noise Amplifier with High Gain and ESD Protection
Arthur Liraneto Torres Costa, Hamilton Klimach and Sergio Bampi
16:20-16:40 CMOS Transconductor Analysis for Low Temperature Sensitivity Based on the ZTC MOSFET Condition
Pedro Toledo, Hamilton Klimach, David Cordova, Sergio Bampi and Eric Fabris
16:40-17:00 Design and Optimization of High Sensitivity Transimpedance Amplifiers in 0.13 um CMOS and BiCMOS Technologies for High Speed Optical Receivers
André Ponchet, Ezio Bastida, Roberto Panepucci, Jacobus Swart and Celio Finardi
Challenges for Semiconductor in Brazil and 10 years of the program IC Brazil
Room: Fernando Pessoa 1 & 2
Moderator: Jacobus W. Swart
19:20-21:00 Conference Dinner
Friday, September 4th
Keynotes - Room: Fernando Pessoa 1 & 2
Keynote 3
A Path towards Average-Case Silicon via Asynchronous Resilient Bundled-Data Design
Peter Beerel
University of Southern California (USC) in Los Angeles
09:40-10:00 Coffe-Break & Exhibitors
Session 7 - Analog & RF & Mixed Signal - Room: Fernando Pessoa 2
Chair: Yuri Sebastian Catunda
10:00-10:20 System-level Design of Single-bit Sigma-Delta Modulators Based on MSA and SNR Data Graphics
Raphael Viera, Jorge de la Cruz, André Luiz Aita, César Augusto Prior and João Baptista Martins
10:20-10:40 Direct Feedback Topology for Reducing Residual Voltage in Functional Electrical Stimulation
Lucas Teixeira, Cesar Rodrigues and César Prior
10:40-11:00 Analysis and System-Level Design of a High Resolution Incremental Ʃ∆ ADC for Biomedical Applications
Antonio Soares, Diomadson Belfort, Sebastian Catunda, Raimundo Carlos Silvério Freire
11:00-11:20 Novel Compact Active Dual Response Filter Within a Single Device
Raafat Lababidi, Frédéric Le Roy, Denis Le Jeune, Ali Mansour, Julien Lintignat and Ali Louzir
11:20-11:40 Effective Cross Comparison of Mismatch Effects on Different Logarithmic Pixel Sensor Topologies
Ewerton Gomes de Oliveira, Carlos Augusto de Moraes Cruz and Davies William de Lima Monteiro
12:00-13:20 Lunch
Invited Talks - Room: Fernando Pessoa 2
Invited Talk 3
Rethinking "Things" Design - The Missing Technology Link in the Internet of Things (IoT)
Massimo Alioto
National Univ. of Singapore
Session 8 - Digital, Reconfigurable and Applications - Room: Fernando Pessoa 2
Chair: Ivan Saraiva Silva
Differential Evolution to Reduce Energy Consumption in Three-Level Memory Hierarchy
Abel Silva-Filho and Leonardo Nunes
14:20-14:40 IPNOSYS II - A New Architecture for IPNOSYS Programming Model
Thiago Rodrigues, Ivan Silva and Silvio Fernandes
14:40-15:00 Improving the Statistical Variability of Delay-based Physical Unclonable Functions
Jefferson Capovilla, Mario Cortes and Guido Araujo
15:00-15:20 Run-time Cache Configuration for the LEON-3 Embedded Processor
Bruno Silva, Lucas Cuminato, Pedro Diniz and Vanderlei Bonato
Best Papers Awards - Room: Fernando Pessoa 1 & 2 - 16:00 - 16:20
Closing Ceremony - - Room: Fernando Pessoa 1 & 2 - 16:20 - 16:40